ELF>И@@10GNUY+=6l79ٚLinuxLinux6.1.0-41-amd64`vPv#t tu* t[v(0t˃Pu^puYtu u- ff.f |w8e  HHHE@!v\ v'H0tHHtHvgH t0HHtHtMHHHEH RuoHHHHHHHHHHHELJ(5LJ01fUSHtfHHǃ Hǃ,ǃHǃHǃ@[]HHHff.fHSH=u FHH=t;;XuP;Pr(H@HcH[P1[DHHHHpfAW AVAUATUHSHD eH%(H$1H\$PHHEHE1E1IJ HI9LGI9LBHHH9uI 1ILL$HI}HHHLIHHQL9uHD$HL$Et-H JH8;psH0HcH4HtH0[][]U1SHH+ H0HuH@H[]7HHZ[]A\A]A^A_HߋHHDHDHHHHzHH`HHFDH2H!DHDHH[H])H倃A[H]HH[]A\A]AH[]A\A]HDH[H]A\A]1HL$L$HHAHHHA1HL$L$H1HL$L$AVAUATUSHHH`H=t IHI"H=HHL#Ht HL3HLkLM$$HII"L#Ht HL3HLkLM$$HII"L#Ht HL3HLkLM$$[H]A\A]A^AWAVAUATUSH05eH%(HD$(1FtHA* H=h HHuHA HHH Ht$tt%Hdd " Dž@=HHuDžHHHDžH HD$ H|$ 1Ht$ D'HA0tQuMHA " 6"DH|$ A?:uH1Ht$ H|$ AHD$ 8,uHHD$ H= HHuHA9XHHD`HD$ 8HHHD$ H|$ 1Ht$ D'HA0tuHAH|$ A?:uH1Ht$ H|$ AHD$ 8,uHHD$ H= HHuHAXHHD`HD$ 82HHHD$ H|$ 1Ht$ D'HA0tuHA_H|$ A?:uH1Ht$ H|$ AHD$ 8,uHHD$ H= HHuHAXHHD`HD$ 82HHHH1ҾHHDžH AątH2H5 VtwHHHHH9tHAHFTD≕HHH‹<HƒVʋHȉNHF1Ҿ HH<HHuHAVL ILHMtHAAH1҃MiLHEQDTAILA XEAhLIDPʉpH1LH`AxA|DAȉtDE1lDAu"ǃ0ǃB!AAHHAH=HHL+Ht.HHHHH"HCLMmHL+Ht.HHHHH"HCLMmHL+Ht.HHHHH"HCLMmHI҃I= L E1E1IJI)MBIȋMcA9PJ HAL9rHDH LL$LD$HL$L$L$LL$HL$LD$III0HjHA/Mtp uHAUDMk0HL$ L$IHI uHM M u HHHHHTHXHPH pHtHHxH|HHXH`HH HHHH=HBIH=vAąB@DrHrHAypH?HHHHuHBh HHuHH LA1LpHH0HuHD;psH0Ic1AH ⋳hE111HH8HuHH0]h H@HHuhHH"hHHAąJ%AJ; I0IuHHHtnHD$ H|$ 1Ht$ D'A0tuHAƋPHHuHD$ 8,uHHD$ HD$ 8uDH=11H Aąu}HHHt2Hw)IHHH`HtHfH=v^HAH=t HdI҃I1HD$(eH+%(tH0D[]A\A]A^A_3[nandsim] error: get_state_by_command: unknown command, BUG 3[nandsim] error: get_state_name: unknown state, BUG 3[nandsim] error: BCH not available on small page devices 3[nandsim] error: Invalid BCH value %u 6[nandsim] Using %u-bit/%u bytes BCH ECC [nandsim] debug: switch_to_ready_state: switch to %s state 4[nandsim] warning: simulating read error in page %u Total numbers of erases: %lu Average number of erases: %lu Maximum number of erases: %lu Minimum number of erases: %lu Number of ebs with erase counts from %lu to %lu : %lu drivers/mtd/nand/raw/nandsim.c3[nandsim] error: wrong bus width (%d), use only 8 or 16 3[nandsim] error: unable to allocate core structures. 3[nandsim] error: bbt has to be 0..2 3[nandsim] error: invalid weakblocks. 3[nandsim] error: unable to allocate memory. 3[nandsim] error: invalid weakpages. 3[nandsim] error: invalid gravepagess. 3[nandsim] error: Could not scan NAND Simulator device 3[nandsim] error: overridesize is too big 3[nandsim] error: Too many erase blocks for wear reporting 3[nandsim] error: init_nandsim: nandsim is already initialized 3[nandsim] error: init_nandsim: unknown page size %u 3[nandsim] error: too many partitions. 3[nandsim] error: bad partition size. 4[nandsim] warning: 16-bit flashes support wasn't tested flash size with OOB: %llu KiB 3[nandsim] error: alloc_device: cache file not readable 3[nandsim] error: alloc_device: cache file not writeable 3[nandsim] error: alloc_device: unable to allocate pages written array 3[nandsim] error: alloc_device: unable to allocate file buf 3[nandsim] error: alloc_device: unable to allocate page array 3[nandsim] error: cache_create: unable to create kmem_cache 3[nandsim] error: init_nandsim: unable to allocate %u bytes for the internal buffer 3[nandsim] error: invalid badblocks. 4[nandsim] warning: CONFIG_MTD_PARTITIONED_MASTER must be enabled to expose debugfs stuff 3[nandsim] error: cannot create "nandsim_wear_report" debugfs entry 4[nandsim] warning: read_page: flipping bit %d in page %d reading from %d ecc: corrected=%u failed=%u 4[nandsim] warning: do_state_action: wrong page number (%#x) 3[nandsim] error: do_state_action: column number is too large [nandsim] debug: read_page: page %d not written [nandsim] debug: read_page: page %d written, reading from %d 3[nandsim] error: read_page: read error for page %d ret %ld [nandsim] debug: read_page: page %d not allocated [nandsim] debug: read_page: page %d allocated, reading from %d [nandsim] debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d [nandsim] log: read page %d (second half) [nandsim] log: read OOB of page %d 3[nandsim] error: do_state_action: device is write-protected, ignore sector erase 3[nandsim] error: do_state_action: wrong sector address (%#x) [nandsim] debug: do_state_action: erase sector at address %#x, off = %d [nandsim] log: erase sector %u [nandsim] debug: erase_sector: freeing page %d 3[nandsim] error: Erase counter total overflow 3[nandsim] error: Erase counter overflow for erase block %u 4[nandsim] warning: simulating erase failure in erase block %u 4[nandsim] warning: do_state_action: device is write-protected, programm 3[nandsim] error: do_state_action: too few bytes were input (%d instead of %d) [nandsim] debug: prog_page: writing page %d 3[nandsim] error: prog_page: read error for page %d ret %ld 3[nandsim] error: prog_page: write error for page %d ret %ld [nandsim] debug: prog_page: allocating page %d 3[nandsim] error: prog_page: error allocating memory for page %d [nandsim] debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d [nandsim] log: programm page %d 4[nandsim] warning: simulating write failure in page %u [nandsim] debug: do_state_action: set internal offset to 0 3[nandsim] error: do_state_action: BUG! can't skip half of page for non-512byte page size 8x chips [nandsim] debug: do_state_action: set internal offset to %d [nandsim] debug: do_state_action: BUG! unknown action [nandsim] debug: find_operation: operation found, index: %d, state: %s, nxstate %s [nandsim] debug: find_operation: no operation found, try again with state %s [nandsim] debug: find_operation: no operations found [nandsim] debug: find_operation: BUG, operation must be known if address is input [nandsim] debug: find_operation: there is still ambiguity [nandsim] debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s [nandsim] debug: switch_state: operation is unknown, try to find it [nandsim] debug: switch_state: double the column number for 16x device 4[nandsim] warning: switch_state: not all bytes were processed, %d left [nandsim] debug: switch_state: operation complete, switch to STATE_READY state [nandsim] debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s 3[nandsim] error: switch_state: BUG! unknown data state 3[nandsim] error: switch_state: BUG! unknown address state 3[nandsim] error: write_byte: chip is disabled, ignore write 3[nandsim] error: write_byte: ALE and CLE pins are high simultaneously, ignore write 3[nandsim] error: write_byte: unknown command %#x 4[nandsim] warning: write_byte: command (%#x) wasn't expected, expected state is %s, ignore previous states [nandsim] debug: command byte corresponding to %s state accepted [nandsim] debug: write_byte: operation isn't known yet, identify it 3[nandsim] error: write_byte: address (%#x) isn't expected, expected state is %s, switch to STATE_READY 3[nandsim] error: write_byte: no more address bytes expected [nandsim] debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected) [nandsim] debug: address (%#x, %#x) is accepted 3[nandsim] error: write_byte: data input (%#x) isn't expected, state is %s, switch to %s 4[nandsim] warning: write_byte: %u input bytes has already been accepted, ignore write 3[nandsim] error: read_buf: chip is disabled 3[nandsim] error: read_buf: ALE or CLE pin is high 4[nandsim] warning: read_buf: unexpected data output cycle, current state is %s 3[nandsim] error: read_byte: chip is disabled, return %#x 3[nandsim] error: read_byte: ALE or CLE pin is high, return %#x 4[nandsim] warning: read_byte: unexpected data output cycle, state is %s return %#x [nandsim] debug: read_byte: return %#x status 4[nandsim] warning: read_byte: no more data to output, return %#x [nandsim] debug: read_byte: read ID byte %d, total = %d [nandsim] debug: read_byte: all bytes were read 3[nandsim] error: read_buf: too many bytes to read 3[nandsim] error: write_buf: data input isn't expected, state is %s, switch to STATE_READY 3[nandsim] error: write_buf: too many input bytes [nandsim] debug: write_buf: %d bytes were written debug: write_buf: %d bytes were written debug: address (%#x, %#x) is accepted debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected) debug: write_byte: operation isn't known yet, identify it debug: command byte corresponding to %s state accepted debug: read_byte: all bytes were read debug: read_byte: read ID byte %d, total = %d debug: read_byte: return %#x status debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s debug: switch_state: operation complete, switch to STATE_READY state debug: switch_state: double the column number for 16x device debug: switch_state: operation is unknown, try to find it debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s debug: do_state_action: BUG! unknown action debug: do_state_action: set internal offset to %d debug: do_state_action: set internal offset to 0 debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d debug: do_state_action: erase sector at address %#x, off = %d log: read page %d (second half) debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d debug: prog_page: allocating page %d debug: prog_page: writing page %d debug: erase_sector: freeing page %d debug: read_page: page %d allocated, reading from %d debug: read_page: page %d not allocated debug: read_page: page %d written, reading from %d debug: read_page: page %d not written debug: find_operation: there is still ambiguity debug: find_operation: BUG, operation must be known if address is input debug: find_operation: no operations found debug: find_operation: no operation found, try again with state %s debug: find_operation: operation found, index: %d, state: %s, nxstate %s debug: switch_to_ready_state: switch to %s state STATE_READYSTATE_CMD_READ1STATE_CMD_ERASE2STATE_CMD_READOOBSTATE_CMD_READSTARTSTATE_CMD_ERASE1STATE_CMD_STATUSSTATE_CMD_SEQINSTATE_CMD_READIDSTATE_CMD_PAGEPROGSTATE_CMD_RESETSTATE_CMD_RNDOUTSTATE_CMD_RNDOUTSTARTSTATE_ADDR_PAGESTATE_ADDR_SECSTATE_ADDR_ZEROSTATE_ADDR_COLUMNSTATE_DATAINSTATE_DATAOUTSTATE_DATAOUT_IDSTATE_DATAOUT_STATUSSTATE_CMD_READ0STATE_UNKNOWNNumber of erase blocks: %u &nfc->lockNAND simulator partition %dflash size: %llu MiB page size: %u bytes OOB area size: %u bytes sector size: %u KiB pages number: %u pages per sector: %u bus width: %u bits in sector size: %u bits in page size: %u bits in OOB size: %u page address bytes: %u sector address bytes: %u options: %#x nandsimnandsim_wear_report[nandsim] log: read page %d [nandsim] log: reset chip log: reset chip log: programm page %d log: erase sector %u log: read OOB of page %d log: read page %d ns_nand_write_bufns_nand_read_bytens_switch_to_ready_statens_switch_statens_prog_pagens_erase_sectorns_read_pagens_do_state_actionns_find_operationns_nand_write_bytebchbbtcache_fileoverridesizegravepagesbitflipsweakpagesweakblocksbadblocksparts dbglogdo_delaysbus_widthinput_cycleoutput_cycleerase_delayprogramm_delayaccess_delayfourth_id_bytethird_id_bytesecond_id_bytefirst_id_byteid_bytesdescription=The NAND flash simulatorauthor=Artem B. Bityuckiylicense=GPLparm=bch:Enable BCH ecc and set how many bits should be correctable in 512-byte blocksparm=bbt:0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data areaparm=cache_file:File to use to cache nand pages instead of memoryparm=overridesize:Specifies the NAND Flash size overriding the ID bytes. The size is specified in erase blocks and as the exponent of a power of two e.g. 5 means a size of 32 erase blocksparm=gravepages:Pages that lose data [: maximum reads (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be read only twice before failingparm=bitflips:Maximum number of random bit flips per page (zero by default)parm=weakpages:Weak pages [: maximum writes (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be written only twice before failingparm=weakblocks:Weak erase blocks [: remaining erase cycles (defaults to 3)] separated by commas e.g. 113:2 means eb 113 can be erased only twice before failingparm=badblocks:Erase blocks that are initially marked bad, separated by commasparm=parts:Partition sizes (in erase blocks) separated by commasparm=dbg:Output debug information if not zeroparm=log:Perform logging if not zeroparm=do_delays:Simulate NAND delays using busy-waits if not zeroparm=bus_width:Chip's bus width (8- or 16-bit)parm=input_cycle:Word input (to flash) time (nanoseconds)parm=output_cycle:Word output (from flash) time (nanoseconds)parm=erase_delay:Sector erase delay (milliseconds)parm=programm_delay:Page programm delay (microsecondsparm=access_delay:Initial page access delay (microseconds)parm=fourth_id_byte:The fourth byte returned by NAND Flash 'read ID' command (obsolete)parm=third_id_byte:The third byte returned by NAND Flash 'read ID' command (obsolete)parm=second_id_byte:The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete)parm=first_id_byte:The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete)parm=id_bytes:The ID bytes returned by NAND Flash 'read ID' commandparmtype=bch:uintparmtype=bbt:uintparmtype=cache_file:charpparmtype=overridesize:uintparmtype=gravepages:charpparmtype=bitflips:uintparmtype=weakpages:charpparmtype=weakblocks:charpparmtype=badblocks:charpparmtype=parts:array of ulongparmtype=dbg:uintparmtype=log:uintparmtype=do_delays:uintparmtype=bus_width:uintparmtype=input_cycle:uintparmtype=output_cycle:uintparmtype=erase_delay:uintparmtype=programm_delay:uintparmtype=access_delay:uintparmtype=fourth_id_byte:byteparmtype=third_id_byte:byteparmtype=second_id_byte:byteparmtype=first_id_byte:byteparmtype=id_bytes:array of bytedepends=mtd,nandretpoline=Yintree=Yname=nandsimvermagic=6.1.0-41-amd64 SMP preempt mod_unload modversions  (0880(    (0( 0 (08@80( @ (08@80( @ ( ( (08@   ( ( ( ( ( (08H80( H @80( @( ( ( H (0(  (08h80( m__fentry__9[__x86_return_thunk~_printkeb,__dynamic_pr_debug 7Aget_random_bytesh__list_add_validq@isingle_open'seq_printfV __stack_chk_failUrS__list_del_entry_valid zkfreevfree:filp_closeBkmem_cache_freedTkmem_cache_destroy\jUdebugfs_removeY mtd_device_unregister+jnand_cleanupohugetlb_optimize_vmemmap_key"Xdevmap_managed_keygf__folio_putR__put_devmap_managed_page_refsGopagecache_get_page#Wunlock_pageQЧkwrite_inode_now탦current_taskښeNkernel_write̕kkernel_read kmalloc_cachesRkmalloc_trace) simple_strtoul __mutex_init]nand_scan_with_idsE:#__kmalloc7M8kasprintffilp_openI@vzallochvmalloc)Wvkmem_cache_create2nand_create_bbtdˋmtd_block_markbadA"<mtd_device_parse_registerֹmdebugfs_create_file Oget_random_u16__get_random_u32_belowk}__udelay__const_udelayŏWmemset8߬imemcpy6kmem_cache_allocK9seq_lseek2lseq_readX ]single_release pparam_ops_uintuIparam_ops_charp$:param_array_opsparam_ops_ulongLparam_ops_byte module_layoutr  J  w@@P`   @  P  `  00 @  092(9{r]geHFD@ nandsimGCC: (Debian 12.2.0-14+deb12u1) 12.2.0GCC: (Debian 12.2.0-14+deb12u1) 12.2.0x)x)! ; EHV [@dtU@Sb@@@@@@@@D  m@DD  D@D`D o&@DD"DT@DT`E E E/E BE@OE H"o&Q@[EQbEQiEQsET@{EE0E"** EO @  B8cCD]T @DTETETETETE E@E`FFV -"F@,F4FBFOF_F@lFsFzFF@FFFF@FˆFFˆF@GG+G@GĈ@HGƈNGȈTGȈ\GȈ@gGʈyGʈGʈ G@ G̈ Gƈ Gƈ G̈@ Gƈ GK Gh G H@ ([k  :" H@$H$$H%)H@%%p `% @&h';HdR! LH*u)@_H   iHxHH()$`"--]*HHHJHJx  PQ=` PQ PQCD PQQD P Q PÈ ň PLj PɈ ˈH $HS1 E@H`HII+I;IDIWIfI |I|  I@I`'  ψIII8l5kI @cшތψ IPI҈sE@bE`E҈"IJJ9JSJpJJJJJJJK*K4J@>x@?sOG?}O@@O`@OH@O$@IA@A([kF u@   u@ TT TTu@  O&O-O*@O-O-O*O* O*@P*` P*P*P*$P*-P*6P* ?P*@HP*`QP*YP*aP*iP*sP*{P* P*@P*`P*P*P*P*P*P* P*@P-P*P*P*P* P*@Q*`Q#O-O*@O-O-!Q*)Q* O*@1Q*`:Q*CQ*MQ*WQ*P*P* `Q*@QP*`YP*hQ*sQ*~Q*Q*Q* Q*@aP*`Q*iP*{P*Q*P*P* P*@P*`P*Q*Q*QQQQ Q R"@Rc Vw @ $R$6RIR0]@PRo&[QS@cRKnRGRRRRRR RS(c@S Sn -S@4S ;T>GT XTA@ P= @?pTsE([k@T CDT"--@T'  F)TJx TTT (V?K@S1TDCEL T0V &@"TT7 T @ NUzOP S kT b W Y [ ] _UiHU#UT@L`)UL/U8UL@UL IUL@OUL`UUL^ULfULrULUL"CD $L@L`L>cL(6LGU U@ C`UhvE)Fp fHUxUL x~Y@xCTxTxUTx[yUg@yU`yUpyXhyUy[azUb@zc|{A d`}~p@~Uk~UÃ~UwN TaU VT+j Ti V `V-V8VDV `NVVVaVmV `NVxVVMe͈nmlވV V p vV x v[$VKV z u pV | u pzQTV ~ u p>cV  u p>cW  Ru p20[kQތPW %W 2W | u p(T?W  u pCDQW  T"jW  ?TW W |W |W  Zo%kW otp_infomtd_ecc_statscorrectedbbtblockserase_infofail_addrmtd_erase_region_infoerasesizenumblockslockmapmtd_req_statsuncorrectable_errorscorrected_bitflipsmax_bitflipsmtd_oob_opsretlenooblenoobretlenooboffsdatbufoobbufmtd_oob_regionmtd_ooblayout_opswritesizewritebufsizeoobsizeoobavailerasesize_shiftwritesize_shifterasesize_maskwritesize_maskbitflip_thresholdooblayoutpairingecc_step_sizeecc_strengthnumeraseregionseraseregions_erase_point_unpoint_read_write_panic_write_read_oob_write_oob_get_fact_prot_info_read_fact_prot_reg_get_user_prot_info_read_user_prot_reg_write_user_prot_reg_lock_user_prot_reg_erase_user_prot_reg_writev_sync_lock_unlock_is_locked_block_isreserved_block_isbad_block_markbad_max_bad_blocks_suspend_resume_reboot_get_device_put_deviceoops_panic_writereboot_notifierecc_statssubpage_sftusecountdbgotp_user_nvmemotp_factory_nvmemmtd_pairing_infomtd_pairing_schemeget_wunitmtd_debug_infodfs_dirmtd_partmtd_masterpartitions_lockchrdev_locknand_memory_organizationbits_per_cellpages_per_eraseblockeraseblocks_per_lunmax_bad_eraseblocks_per_lunplanes_per_lunluns_per_targetntargetsnand_row_converterlun_addr_shifteraseblock_addr_shiftnand_posplaneeraseblocknand_page_io_req_typeNAND_PAGE_READNAND_PAGE_WRITEnand_page_io_reqdataoffsdatabufnand_ecc_engine_typeNAND_ECC_ENGINE_TYPE_INVALIDNAND_ECC_ENGINE_TYPE_NONENAND_ECC_ENGINE_TYPE_SOFTNAND_ECC_ENGINE_TYPE_ON_HOSTNAND_ECC_ENGINE_TYPE_ON_DIEnand_ecc_placementNAND_ECC_PLACEMENT_UNKNOWNNAND_ECC_PLACEMENT_OOBNAND_ECC_PLACEMENT_INTERLEAVEDnand_ecc_algoNAND_ECC_ALGO_UNKNOWNNAND_ECC_ALGO_HAMMINGNAND_ECC_ALGO_BCHNAND_ECC_ALGO_RSnand_ecc_propsengine_typeplacementstrengthstep_sizenand_bbtnand_opsmarkbadisbadnand_devicemtdmemorgrowconvbbtnand_ecc_contextnstepsnand_ecc_engine_opsinit_ctxcleanup_ctxprepare_io_reqfinish_io_reqnand_ecc_engine_integrationNAND_ECC_ENGINE_INTEGRATION_INVALIDNAND_ECC_ENGINE_INTEGRATION_PIPELINEDNAND_ECC_ENGINE_INTEGRATION_EXTERNALnand_ecc_engineintegrationnand_eccdefaultsrequirementsuser_confondie_engineenginenand_bbt_descrveroffsmaxblocksreserved_block_codeonfi_paramstPROGtBERStRtCCSfast_tCADsdr_timing_modesnvddr_timing_modesvendor_revisionnand_parameterssupports_set_get_featuresset_feature_listget_feature_listonfinand_idnand_ecc_ctrlprepadpostpadcalc_bufcode_bufhwctlcalculatecorrectread_page_rawwrite_page_rawread_subpagewrite_subpagewrite_oob_rawread_oob_rawread_oobwrite_oobnand_chipcurrent_interface_configbest_interface_configbbt_erase_shiftbbt_optionsbadblockposbadblockbitsbbt_tdbbt_mdbadblock_patternphys_erase_shiftchip_shiftpagemasksubpagesizeoob_poipagecacheresume_wqcur_csread_retriessecure_regionsnr_secure_regionsnand_sdr_timingstBERS_maxtCCS_mintPROG_maxtR_maxtALH_mintADL_mintALS_mintAR_mintCEA_maxtCEH_mintCH_mintCHZ_maxtCLH_mintCLR_mintCLS_mintCOH_mintCS_mintDH_mintDS_mintFEAT_maxtIR_mintITC_maxtRC_mintREA_maxtREH_mintRHOH_mintRHW_mintRHZ_maxtRLOH_mintRP_mintRR_mintRST_maxtWB_maxtWC_mintWH_mintWHR_mintWP_mintWW_minnand_nvddr_timingstAC_mintAC_maxtCAD_mintCAH_mintCALH_mintCALS_mintCAS_mintCK_mintDQSCK_mintDQSCK_maxtDQSD_mintDQSD_maxtDQSHZ_maxtDQSQ_maxtDSC_mintQHS_maxtWRCK_minnand_interface_typeNAND_SDR_IFACENAND_NVDDR_IFACEsdrnvddrnand_timingsnand_interface_confignand_op_cmd_instrnand_op_addr_instrnaddrsnand_op_data_instrforce_8bitnand_op_waitrdy_instrnand_op_instr_typeNAND_OP_CMD_INSTRNAND_OP_ADDR_INSTRNAND_OP_DATA_IN_INSTRNAND_OP_DATA_OUT_INSTRNAND_OP_WAITRDY_INSTRwaitrdynand_op_instrdelay_nsnand_operationinstrsninstrsnand_controller_opsattach_chipdetach_chipsetup_interfacenand_controllernand_legacyIO_ADDR_RIO_ADDR_Wselect_chipread_bytecmd_ctrlcmdfuncdev_readywaitfuncblock_badblock_markbadset_featureschip_delaydummy_controllernand_chip_opslock_areaunlock_areasetup_read_retrychoose_interface_confignand_manufacturernand_manufacturer_descnand_secure_regionbitflipsmfr_idstrength_dsstep_dsnand_flash_devchipsizemtd_partitionmask_flagsmtd_part_parser_datans_memtotszsecszoobsztotszoobpgszoobsecszoobpgnumpgsecsecshiftpgshiftpgaddrbytessecaddrbytesidbytesclealenandsimnbpartsbuswnxstatepstatesnpstatesstateidxnand_pages_slabgeomfile_bufheld_pagesheld_cntnandsim_operationsreqoptsweak_blockerase_block_nomax_eraseserases_doneweak_pagepage_nomax_writeswrites_donegrave_pagemax_readsreads_donens_cleanup_modulens_init_modulens_attach_chipcheck_onlyns_exec_opns_switch_statens_do_state_actionns_do_bit_flipsns_do_read_errorns_write_filens_read_filens_put_pagesns_find_operationns_switch_to_ready_statens_get_state_by_commandns_get_state_namens_freens_free_devicens_openns_show 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